view:41896 Last Update: 2021-9-11
Jafar Ghazanfarian, Masood Moghaddam
Dual-Phase-Lag Investigation of High-k Material in Novel Generation of Nanoscale MOS Devices
This paper investigates the numerical simulation of dual-phase-lag heat transfer model with considering the effect of self-heating phenomenon in a sub-100 nm NMOSFET finite medium in order to determine the importance of using high-k materials. In addition to the volume heat source (VHS) and thin heat source (THS) models, a coupled electro-thermal model has been also considered in order to achieve the best method of simulating the device performance. Then the DPL model is combined with the conservation of energy in a specific normalization procedure in order to model the nanoscale phonon transport in the transistor. The boundary conditions are selected similar to what exist in a real nanoscale NMOSFET. The temperature-jump boundary condition is used on all boundaries to consider the boundary phonon scattering phenomenon at nanoscale. A three-level finite difference scheme has been employed to obtain the numerical results for an NMOSFET with 25 nm channel length corresponding to the Knudsen number of 4. The distribution of the volumetric heat generation, the temperature field and the hotspot temperature within the device are presented as results and finally, the effect of using high-k materials on the electrical and thermal behavior of the transistor has been investigated.