Abstract

 This paper describes a methodology for analyzing the vulnerability of custom instructions against the electronic faults, considering dierent op-erations and the custom instruction graph topology. Our approach enables designers to optionally constrain the operand types and also the custom functional unit structure to reach an acceptable vulnerability. We have developed a framework to evaluate the desired goal. The presented framework explores the eects of dierent operations and their dependencies on overall vulnerability of the custom functional units. Our ex-periments show that, in most cases, custom functional units with similar speed-ups in performance present dierent vulnerability to soft errors.