Abstract

The thermal performance of 2D field-effect transistors (FET) is investigated frequently by solving the Fourier heat diffusion law and the Boltzmann transport equation (BTE). With the introduction of the new generation of 3D FETs which their thickness is less than the phonon mean-free-path it is necessary to carefully simulate the thermal performance of such devices. This paper numerically integrates the BTE in common 2D transistors including planar single layer and Silicon-On-Insulator (SOI) transistor, and the new generation of 3D transistors including FinFET and Tri-Gate devices. In order to decrease the directional dependency of results in 3D simulations; the Legendre equal-weight quadrature set has been employed. It is found that if similar switching time is assumed for 3D and 2D FETs while the new generation of 3D FETs has less net energy consumption, they have higher hot-spot temperature. The results show continuous heat flux distribution normal to the silicon/oxide interface while the temperature jump is seen at the interface in double layer transistors.